专利摘要:
The present invention relates to a method for mechanically separating layers, in particular, in a double layer transfer process, more particularly, to a method for mechanically separating layers, comprising the steps of providing a semiconductor compound (206) comprising a layer of a handling substrate (204) and an active layer (202) with a front major face (209) and a rear major face (211) opposite to said front major face (209), the substrate layer of manipulation (204) being attached to the main front face (209) of the active layer (202), then providing a layer of a carrier substrate (207) on the main rear face (211) of said active layer ( 202), and then finally initiating the mechanical separation of said manipulation substrate layer (204), the manipulation substrate layer (204) and the carrier substrate layer (207) being provided with a substantially mechanical structure. symmetrical.
公开号:BE1023710B1
申请号:E2016/5406
申请日:2016-06-02
公开日:2017-06-22
发明作者:Ionut Radu;Marcel Broekaart;Didier Landru
申请人:Soitec;
IPC主号:
专利说明:

Mechanical separation method for a double layer transfer Background of the invention
The present invention relates to a method for mechanically separating layers, particularly in a double layer transfer process. The present invention more particularly relates to a method for mechanically separating layers according to the preamble of claim 1.
The layer transfer of electronic devices using the slice bonding is commonly used in several semiconductor applications. Double-layer (or two-layer) (DLT) transfer of an active layer device is particularly important when improving semiconductor devices, for example, when replacing an initial carrier substrate carrying a layer active by a new carrier substrate of a different material for a better performance of the active layer device.
Figure 1 schematically illustrates an example of a known DLT process for replacing the initial carrier substrate of an active layer device 100 with a new carrier substrate. In this known process, the active layer device 100 comprises an initial Si or glass carrier substrate 101 carrying an active device layer 102 with a buried oxide layer (BOX) 103 therebetween.
According to the known process and as illustrated hereinafter in Fig. 1, a temporary Si handling substrate 104 is then attached to the active layer 102 on the side of the active layer device 100 opposite the initial Si substrate carrier 101, forming thus an intermediate compound 105.
As illustrated in greater detail, the initial Si substrate 101 is then detached from the intermediate 105, usually by mechanical separation with a blade or cutting edge inserted at the interface between the initial Si carrier substrate 101 and the BOX layer 103 or, alternatively, by polishing and / or etching, thereby forming a subsequent intermediate compound 106. At this stage, in case of mechanical separation, the initial carrier substrate 101 risk to be damaged or broken because of the stress exerted on it by the blade or the edge. In case of polishing and / or etching, there is a risk of entrapment of particles. Thus, at this stage, there are risks that the initial carrier substrate 101 can not be recycled. Such risks may be acceptable depending on whether it is desirable to reuse the initial carrier substrate 101 or not for other processes.
FIG. 1 then shows that a final high resistivity (HR) carrier substrate 107 is subsequently fixed, for example by direct bonding or by any suitable layer transfer technology, to the active device layer 102 at level of the BOX layer 103, in place of the detached initial Si carrier substrate 101, thus forming a subsequent intermediate compound 108. According to the applications, it is known to use homogeneous substrates (for example RF substrates) or composite substrates (for example multilayer) for the final HR substrate 107. In addition, it is known that the fixing step may require additional complex steps of surface preparation.
The temporary Si handling substrate 104 used in the DLT process is then detached by mechanical separation. A blade or cutting edge is introduced at the interface between the active layer 102 and the temporary Si manipulation substrate 104 to initiate mechanical separation along this interface to obtain the active layer device. final 110 desired.
However, at this point, the mechanical force required to remove the temporary Si handling substrate 104 affects the integrity of the welded structure. Thus, the rupture of the wafer, in particular the damage to the surface 109 of the active layer 102 and / or the damage of the final HR carrier substrate 107, may occur during this mechanical separation step.
Variants of DLT processes are also known, in which, starting from compound 106, a final carrier substrate of a polymeric material is overmolded on the back side of active layer 102 instead of being attached to it by means of technologies. direct bonding or layer transfer. It is known that in the resulting compound, prior to the mechanical separation of the temporary Si handling substrate, the final carrier substrate is also attached to the temporary Si handling substrate at edge regions thereof.
Thus, in addition to the above-mentioned risk of wafer breakage, known variants of DLT processes also present risks that complete separation of the temporary Si handling substrate can not be achieved properly, particularly at edge regions. fixed overlapping the temporary handling substrate and the carrier substrate.
Object of the invention
An object of the present invention is, therefore, to provide an improved DLT process for replacing the initial carrier substrate of an active layer device by taking into account the aforementioned problems.
In particular, an object of the present invention is to improve the mechanical separation of the temporary handling substrate of the active layer by preventing slice breaking and damage to the surface of the active layer.
DESCRIPTION OF THE INVENTION The object of the invention is obtained by means of a method for mechanically separating the layers according to claim 1. The advantageous features are described in the dependent claims and will also be detailed below.
In this context, a "substantially symmetrical mechanical structure" means that even if the layer of the temporary handling substrate and the layer of the final carrier substrate have different intrinsic mechanical properties (elasticity / rigidity, toughness, etc.) and / or different geometries (thickness, shape, etc.) relative to each other, they are provided in such a way that the overall mechanical properties on either side of the active layer are substantially the same when the mechanical separation is initiated. Consequently, the mechanical stresses during the mechanical separation step are uniformly distributed on either side of the active layer, which makes it possible to avoid slice breakage or incomplete separation, as we know it. will be detailed in more detail below.
The mechanical and geometrical properties such as stiffness and thickness of the replacement carrier substrate can be very different from those of the temporary handling substrate, which is initially chosen so as to achieve a successful mechanical separation of the original carrier substrate in the first steps of DLT processes known. These mechanical and / or geometrical asymmetries can be even more important when the replacement carrier substrate is provided in the form of a composite stack of layers of materials having different mechanical properties.
It has been discovered that the mechanical asymmetry (elasticity / stiffness, toughness, etc.) between the provisional handling substrate and the final HR carrier substrate affects the mechanical force required to remove the temporary Si handling substrate. It has also been discovered that the geometric asymmetry (thickness, shape, etc.) between the final carrier substrate and the temporary handling substrate can also affect the mechanical separation.
Thus, after placing the replacement carrier substrate on the active layer, for the subsequent mechanical separation of the temporary handling substrate, the present invention allows the mechanical stresses to be evenly distributed between the temporary handling substrate and the replacement carrier substrate. This minimizes the maximum stress level in the materials during mechanical separation.
In particular, in advantageous embodiments, it has been found that having a Young's modulus of the substrate material multiplied by the thickness of the products at the cube of the layer, or similar E.t3 products for the substrate of temporary manipulation and the carrier substrate allowed to obtain similar deformations. Here, by "similar E.t.sub.3 products" is meant that the difference between the two products E.t3 should preferably be in a range less than or equal to about 20%. Thus, the rupture of the slice could be avoided. In contrast, the use of a temporary handling substrate and a replacement carrier substrate having very different E.t3 products was more likely to lead to slice breaking.
In some embodiments, it may be advantageous to provide the replacement carrier substrate with one or more chamfers, so that direct contact between the temporary handling substrate and the replacement carrier substrate can be avoided. This has the advantage of facilitating the insertion of a blade or a cutting edge at the mechanical separation interface so that a pressure can be applied uniformly on the temporary handling substrate and on the carrier substrate in the purpose of initiating the mechanical separation of the temporary handling substrate.
This has been found to be particularly advantageous in some embodiments of a DLT process, wherein the replacement carrier substrate may be overmolded on the active layer of the device. Indeed, since the replacement carrier substrate must have a strong adhesion to the rear face of the active layer or the circuit, when it is overmolded on the active layer, as for example in the known DLT process illustrated in FIG. 2 the edges of the temporary handling substrate and the replacement carrier substrate also exhibit strong adhesion to one another and, therefore, break during mechanical separation, as they are subject to stress excessive compression.
This has also been found to be advantageous in certain embodiments, wherein the replacement carrier substrate may be in the form of a preformed layer, which is attached, optionally after optional surface preparation steps, to the back side of the carrier. the active layer. In such embodiments, the chamfered edges may be obtained, for example by polishing or etching, on the layer of the replacement carrier substrate before and / or after its attachment to the rear face of the active layer.
In some embodiments, a pattern can be obtained, allowing the transfer of an active layer from a temporary manipulation substrate to a final or replacement carrier substrate having a composite structure. For example, it has been discovered that a replacement carrier substrate having a "soft" layer, for example a polymer, may be advantageous in limiting the risk of wafer breakage during the mechanical separation of the temporary handling substrate. . In particular, for the composite replacement carrier substrates, it has proven advantageous to reproduce the mechanical structure of the replacement carrier substrate on the temporary handling substrate.
Thus, the present invention advantageously allows a correction of the asymmetrical behavior of the welded slices by DLT before the mechanical separation of the temporary handling substrate. In particular, in order to avoid slice breaking and to allow complete separation of the temporary handling substrate, the structure of the final carrier substrate can be reproduced on the temporary handling substrate. The present invention has proved particularly advantageous for final carrier substrates having composite structures.
Brief description of the figures
We will now describe the invention in more detail, based on advantageous embodiments described in combination with the following figures:
Figure 1 schematically illustrates a known DLT process; Figure 2 schematically illustrates a first exemplary embodiment of a mechanical separation method according to the present invention; Figure 3 schematically illustrates a second exemplary embodiment of a mechanical separation method according to the present invention; and FIG. 4 schematically illustrates a third exemplary embodiment of a mechanical separation method according to the invention.
Detailed description of embodiments
Fig. 2 schematically illustrates a first exemplary embodiment of the present invention. In this embodiment, an alternative method for mechanically separating layers according to the present invention will be used in a DLT process performed to replace the original carrier substrate 201 of an existing active layer device 200 with a new substrate. Bearer, preferably Performance Enhancer 207. The first steps, S200 to S202, of the DLT process illustrated in Figure 2 may be similar to those of the known DLT process illustrated in Figure 1.
Thus, in the first embodiment, in step S200, the initial active layer device 200 is provided and includes a layer of an initial carrier substrate 201 carrying an active device layer 202. In the first embodiment, the initial carrier substrate 201 may be a Si carrier substrate, but in other embodiments, the initial carrier substrate 201 could be glass or sapphire or AsGa or the like. Optionally, depending on the process used to obtain the initial active layer device 200, as illustrated in FIG. 2, the active layer 202 may also comprise a buried oxide layer (BOX) 203 on its rear face or its interface 211. with the layer of the initial carrier substrate 201. Since the BOX 203 layer is optional in all the embodiments described hereinafter, the interface 211 will be used indistinctly to describe the rear face of the active layer 202 or the layer BOX 203 which is attached to the layer of the carrier substrate 201.
Next, in step S201, as illustrated in more detail in FIG. 2, a layer of a temporary Si handling substrate 204 is attached to a front face 209 of the active layer 202, which is the opposite free face. at the interface 211 having the initial Si substrate substrate layer 201, thereby forming an intermediate compound 205. Although Si is commonly selected as the material for the temporary handling substrate 204, it will be apparent to those skilled in the art that Other materials could be chosen in place of the latter, depending in particular on the properties of the initial carrier substrate 201 or the new carrier substrate 207, as will be explained hereinafter.
Then, in step S202, as illustrated in more detail in FIG. 2, the initial Si substrate substrate layer 201 is detached from the intermediate compound 205. The mechanical separation is carried out using a blade or a cutting edge inserted between the temporary Si handling substrate layer 204 and the initial Si substrate substrate layer 201 or at the interface 211 between the initial Si substrate layer 201 and the BOX layer 203 , optionally using the temporary Si handling substrate layer 204 as a fulcrum for exerting pressure on the initial Si substrate substrate layer 201. As the temporary Si handling substrate layer 204 is used only temporarily, it is not necessary to know if it is damaged during this step. During this mechanical separation, the initial Si substrate substrate layer 201 is detached, thereby forming another intermediate compound 206 in which the rear face 211 is now free.
Then, in step S203, as better illustrated in FIG. 2, a homogeneous layer 207 made of a highly resistant material, for example a polymer such as SU-8, or glass, or a ceramic glue, or a material presenting a resistivity of at least 10 kΩ-cm is overmolded on the rear face 211 of the active layer 202 and / or the BOX layer 203. This avoids the use of complex surface preparation steps unlike the known DLT process illustrated in FIG. 1. In this step, because of the molding, the layer of the new carrier substrate 207 and the layer of the temporary Si handling substrate 204 adhere to each other at the peripheral regions 212.
In order to avoid wafer breakage when initiating the mechanical separation of the temporary Si handling substrate layer 204, the layer of the new carrier substrate 207 should preferably be provided with a similar mechanical structure. In particular, according to an advantageous variant of the present invention, the layer of the new carrier substrate 207 may be chosen with a Young's modulus E2 and a thickness t2 so that its product E2.t23 corresponds to the product E1.t13 corresponding to the Provisional Si handling substrate layer 204, namely E2.t23 "Ei.ti3, preferably in a range less than or equal to about 20%. Thus, the material for the layer of the new carrier substrate 207 can be selected accordingly. In fact, in the preferred embodiments, depending on the material chosen first between that of the temporary handling substrate 204 or that of the new carrier substrate 207, it is possible to choose the layer, in particular the material, from the other layer. having the appropriate Young's modulus and thickness so as to satisfy the above relationship within the given tolerance range of less than or equal to about 20%. In other words, the temporary carrier substrate layer 204 and / or the novel manipulator substrate layer 207 may be chosen such that their E.t.sub.3 products are similar, especially in a range less than or equal to about 20 %. Conversely, if a predetermined thickness t 2 is desirable for the layer of the new carrier substrate 207, it is also possible to add an optional intermediate thinning step of the temporary Si handling substrate layer 204 so that its thickness allow the above-mentioned correspondence between E.t3 products. In this way, it is possible to obtain the new carrier substrate layer 207 and the temporary Si handling substrate layer 204 with essentially symmetrical mechanical structures and properties, thereby promoting a complete subsequent mechanical separation of the handling substrate layer. in If provisional 204.
Next, in step S204, as illustrated in more detail in FIG. 2, as an alternative or in addition to the adjustment of the products E.t3, according to another advantageous variant of the present invention, the edges 213 of the layer of the new carrier substrate 207 may be chamfered at the overlapping edge regions 212 with the temporary Si handling substrate layer 204 such that there is little or no contact between the layer new carrier substrate 207 and the temporary Si handling substrate layer 204. This can be achieved for example by known methods such as a method of etching, in particular, chemical etching, or polishing of the bevel . In this way, it becomes easier to insert a blade or a cutting edge between the temporary Si handling substrate layer 204 and the new carrier substrate layer 207 to initiate mechanical separation of the temporary Si handling substrate layer. 204.
In addition, since it is now the temporary Si handling substrate layer 204 that needs to be detached, the new carrier substrate layer 207 may be a fulcrum for use of the blade or cutting edge at during the mechanical separation. The chamfered edges 213 can then also advantageously prevent the new carrier layer 207 from being damaged by the lever effect of the blade or cutting edge during the mechanical separation.
Thus, in the first embodiment, the inventive method makes it possible to detach the temporary Si handling substrate layer 204 without risk of wafer breakage and without damaging the new carrier substrate layer 207 or the active layer 202. L Step S205 in Figure 2 further illustrates that, once the temporary Si handling substrate layer 204 is detached, a new final active layer device 210 is obtained, wherein the new performance enhancing carrier substrate 207a replaced the initial Si carrier substrate 201 of the initial active layer device 200.
Figure 3 schematically illustrates a second exemplary embodiment of the invention. In this embodiment, a variant of the method for mechanically separating the layers according to the present invention will be used in another process of DLT, different from that of the first embodiment, made to replace the original carrier substrate of a active layer device with a new carrier substrate, preferably a performance enhancer 307.
As illustrated in FIG. 3, in step S302 there is provided a semiconductor compound 306 comprising a layer of a provisional Si handling substrate 304 attached to a front face 309 of an active layer 302. Said active layer 302 optionally comprises a layer of an oxide 303 on its rear face 311. In this embodiment, the semiconductor compound 306 may be in all respects similar to the intermediate compound 206 of the first embodiment. Thus, in the second embodiment, although the first two steps are not illustrated in FIG. 3, compound 306 may have been provided in steps S300 to S302 which correspond to steps S200 to S202, respectively, of the first embodiment. . Thus, reference is again made to the above description on this subject. In step S303, as illustrated in FIG. 3, a layer of a material with a high homogeneous resistivity 307, for example an RF substrate or a polymer such as SU-8, or glass, or a ceramic glue or a material having a resistivity of at least 10 kΩ-cm is provided. However, unlike the first embodiment illustrated in FIG. 2, which concerns a DLT process in which the new carrier substrate layer 207 is overmolded on the rear face 211 of the active layer 202, the second embodiment concerns a process of DLT wherein the new carrier substrate layer 307 is provided as an already preformed layer having a face 314 configured to be attached or welded to the back face 311 of the active layer 302.
Next, in step S304, as illustrated in more detail in FIG. 3, according to an advantageous variant of the present invention, the peripheral regions 313 of the face 314 can be chamfered. This step can be carried out using known methods, such as etching, thinning, polishing and the like.
Then, in step S305, as illustrated in more detail in FIG. 3, the new carrier substrate layer 307 with chamfers 313 is attached to the rear face 311 of the active layer 302, forming an intermediate compound 308, which is analogous to compound 208 of step S204 of the first embodiment and has the same advantages. Reference is again made, therefore, to the first embodiment for further details. For example, the same advantages concerning the insertion of the blade or cutting edge to initiate the mechanical separation are obtained. Those skilled in the art will appreciate that, in variants of the second embodiment, step S304 of chamfering the peripheral regions 313 of the new carrier substrate layer 407 can also be performed after step S305 of fixing the new carrier substrate 407 to compound 306.
In addition, depending on the technology used to attach the new carrier substrate layer 307 to the active layer 302, optional intermediate steps of surface preparation may be necessary but are not essential to achieve the invention. Moreover, as in the first embodiment, it is also preferable to adapt the corresponding E.t3 products of the temporary Si handling substrate layer 304 and the new carrier substrate layer 307. Thus, additional steps are required. Optional thinning of the temporary Si handling substrate layer 304 could also be advantageous.
Thus, in the second embodiment, the inventive method also allows the detachment of the provisional Si handling substrate layer 304 without risk of wafer breakage and without damage to the layer of new carrier substrate 307 or active layer 302. Step S305 in Figure 3 further illustrates that, once the temporary Si handling substrate layer 304 is detached, a new final active layer device 310 is obtained, in which the new performance enhancing carrier substrate 307 With chamfers 313 has replaced the initial carrier substrate Si of the initial active layer device.
Figure 4 schematically illustrates a third exemplary embodiment of the invention. In this embodiment, a variant of the method for mechanically separating the layers according to the present invention will be used in yet another type of DLT process performed to replace the original carrier substrate of an existing active layer device with a new carrier substrate, preferably performance enhancer 407.
As illustrated in FIG. 4, in step S402 there is provided a semiconductor compound 406 comprising a layer of a Si manipulation substrate 404 attached to a front face 409 of an active layer 402. As in In a previous embodiment, said active layer 402 may optionally include a layer of an oxide 403 on its backside 411. In this embodiment, the semiconductor compound 406 may in all respects be similar to the intermediate compounds 206 and 306 of the foregoing embodiments. . Thus, in the third embodiment, although the first two steps are not illustrated in FIG. 4, the compound 406 may also have been provided in the steps S400 to S402 which correspond, for example, respectively to the steps S200 to S202 described in FIG. the first embodiment. Thus, reference is again made to the above description on this subject.
In the third embodiment, the layer of the new carrier substrate 407 is provided as a composite or multilayer substrate: In step S403, as shown in FIG. 4, a mechanical support layer 415, such as a Si slice monocrystalline or polycrystalline, is provided. Other materials such as glass or sapphire or AsGa or the like could also be suitable.
Next, in step S404, as illustrated in more detail in FIG. 4, at least one layer of a high-resistivity (HR) material 416, such as a ceramic glue, a polymer, a polysilicon or a material having a resistivity of at least 10 μm is deposited on the mechanical support layer 415, thereby forming the composite carrier substrate 407. In alternative embodiments, the HR 416 layer could also be in the form of stacking layers of HR materials, deposited one above the other on the mechanical support layer 415. For example, a layer 416 having a thickness between about 30 μm and about 200 μm could be deposited.
In the third embodiment, in step S405, as illustrated in more detail in FIG. 4, following an advantageous variant of the present invention, the mechanical structure of the composite substrate layer 407, in particular the structure of its layer (s) of material HR 416, is reproduced on the free face 417 opposite the active layer 402 of the compound 406. Thus, essentially the same layer or the same stack of layers 416 is also deposited (e ), in the same order as for the new carrier layer 407, on the free surface 417 of the first compound 406, thereby forming another intermediate compound 418, wherein the temporary Si handling substrate layer 404 and the HR layer filed 416 form a new provisional handling compound 419 for handling the active layer 402.
Then, in step S406, the free surface 414 of the uppermost layer of the stack or single layer 416 is attached to the rear face 411 of the active layer 402, which may be the back side of the layer. of optional oxide 403, thereby forming another subsequent intermediate compound 408, which is comparable to the intermediate compounds 208 and 308 of the foregoing embodiments and has similar advantages, since the mechanical properties of the new composite carrier substrate layer 407 and the intermediate 418 are essentially symmetrical, thus promoting a subsequent mechanical separation step. Those skilled in the art will understand that, in variants of the third embodiment, the step S405 for reproducing the mechanical structure of the composite substrate layer 407, in particular the structure of its layer or layers of HR material 416, on the free face 417 opposite to the active layer 402 of the compound 406, can also be performed after the step S406 for fixing the new carrier substrate layer 407 to the rear face 411 of the active layer 402. other advantageous aspects of the foregoing embodiments are also compatible with the third embodiment. For example, in one variant, the peripheral regions of the composite carrier substrate layer 407 could possibly also be chamfered as described in the second embodiment.
Depending on the technology used to attach the new composite carrier substrate layer 407 to the rear face 411 of the active layer 402, optional intermediate steps of surface preparation may be necessary but are not essential to achieve the invention. Furthermore, as in the previous embodiment, it is also preferable to match the corresponding E.t.sub.3 products as much as possible between the new composite substrate layer 407 and the provisional manipulation compound 419. Thus, a step of Further thinning of the temporary Si manipulator substrate layer 404 could possibly be performed prior to step S405 of reproducing the mechanical structure of the new composite carrier layer 407 on the free face 417 of compound 406.
In the third embodiment, the mechanical separation is then initiated in the intermediate compound 408, for example, by inserting a blade or cutting edge between the temporary handling compound layer 419 and the new composite carrier substrate layer 407 after step S406. The inventive method allows complete separation of the temporary handling compound 419, including the temporary Si handling substrate layer 404 with the reproduced HR layer (s) 416, without the risk of slice breaking and without damaging the new carrier layer 407 or active layer 402. Step S407 in Fig. 4 further illustrates that once provisional handling compound 419 is completely detached, a new final active layer device 410 is made in wherein the new performance enhancing composite carrier substrate 407 has replaced the initial carrier substrate of the initial active layer device.
The present invention, by providing a method for mechanically separating the layers, in which the mechanical structure of the replacement carrier substrate is reproduced on the temporary handling substrate, avoids the risk of slice breaking or damage to the active layer or of the new carrier substrate during the step of mechanical separation of DLT processes.
权利要求:
Claims (10)
[1]
claims
A method for mechanically separating layers, for a dual layer transfer process, comprising the steps of: providing a first intermediate semiconductor compound (205) comprising a layer of an initial carrier substrate (201) and an active layer (202; 302; 402) having a front main face (209; 309; 409) and a rear main face (211; 311; 411) opposite to said front main face (209; 309; 409); wherein the initial carrier substrate layer (201) is attached to the rear major face (211, 311, 411) of the active layer (202; 302; 402); then attaching a temporary manipulating substrate layer (204, 304, 404) to the front main face (209, 309, 409) of the active layer (202, 302, 402); then initiating the mechanical separation of said initial carrier substrate (201) to obtain an intermediate semiconductor compound (206, 306, 406) comprising a temporary carrier substrate layer (204, 304, 404) at the front main face (209, 309, 409) of the active layer (202, 302, 402); then providing a layer of a final carrier substrate (207; 307; 407) on the rear major face (211; 311; 411) of said active layer (202; 302; 402); and then initiating the mechanical separation of said temporary manipulation substrate layer (204; 304; 404) so as to obtain a final semiconductor compound (210; 310; 410) comprising the final carrier substrate layer (207; 407) at the rear main face (211; 311; 411) of the active layer (202; 302; 402); characterized in that the temporary manipulation substrate layer (204; 304; 404) and the final carrier substrate layer (207; 307; 407) are provided with a substantially symmetrical mechanical structure.
[2]
The method of claim 1, wherein the final carrier substrate layer (207; 307) and / or the temporary handling substrate layer (204; 304) are selected such that their E.t3 products are similar. in particular in a range less than or equal to about 20%.
[3]
3. Method according to one of claims 1 or 2, wherein the final carrier substrate (207; 307) is provided with a chamfered region (213; 313).
[4]
4. A method according to any one of claims 1 to 3, wherein the final carrier substrate (207; 307) is in the form of a layer of a homogeneous highly resistant material, in particular a material having a resistivity of at least 10 kQcm.
[5]
The method of any one of claims 1 to 3, wherein the final carrier substrate layer (407) is in the form of a composite layer stack comprising: a mechanical support layer (415); and at least one layer of a high-resistance material (416) deposited thereon; and wherein the highest layer (416) of high resistivity material is placed, in particular fixed, on the rear main face (411) of the active layer (402).
[6]
The method of claim 5, further comprising, prior to the mechanical separation initiation step, a step of reproducing the at least one layer of a high resistivity material (416) on the temporary manipulation substrate (404), in particular on a free face (417) thereof opposite to the active layer (402).
[7]
The method of any one of claims 5 or 6, wherein the mechanical support layer (415) is a monocrystalline or polycrystalline Si wafer.
[8]
The method of any one of claims 5 to 7, wherein the deposited material thickness (416) is in the range of 30 μm to 200 μm.
[9]
The method of any one of claims 5 to 8, wherein the high resistivity material (416) is a ceramic adhesive, a polymer or a material having a resistivity of at least 10 kΩcm.
[10]
The method of any of the preceding claims, further comprising, prior to the step of priming the mechanical separation, a step of thinning the temporary manipulating substrate layer (204; 304; 404).
类似技术:
公开号 | 公开日 | 专利标题
EP1338030B1|2011-06-22|Method for making a substrate in particular for optics, electronics or optoelectronics and resulting substrate
EP2363879A2|2011-09-07|Method for manufacturing a multilayer structure with trimming by thermomechanical effects
FR2935536A1|2010-03-05|PROGRESSIVE DETOURING METHOD
FR2915625A1|2008-10-31|METHOD OF TRANSFERRING AN EPITAXIAL LAYER
FR2957189A1|2011-09-09|METHOD OF MAKING A MULTILAYER STRUCTURE WITH POST GRINDING.
EP3031076A1|2016-06-15|Process for manufacturing a semiconductor structure with temporary bonding via metal layers
BE1023710B1|2017-06-22|MECHANICAL SEPARATION METHOD FOR DOUBLE LAYER TRANSFER
FR2969378A1|2012-06-22|THREE-DIMENSIONAL COMPOSITE STRUCTURE HAVING MULTIPLE LAYERS OF ALIGNMENT MICROCOMPONENTS
EP3552226B1|2021-01-06|Method for transferring thin films
EP3520132B1|2020-07-22|Structure comprising single-crystal semiconductor islands and process for making such a structure
EP3131116A1|2017-02-15|Method for manufacturing an electronic device
EP3497711B1|2020-05-13|Method for producing an epitaxial layer on a growth wafer
EP3035378B1|2017-07-26|Method for transforming an electronic device usable in a method of temporarily adhering a wafer on a support and electronic device manufactured by said method
FR2842646A1|2004-01-23|Increasing area of useful layer of material transferred to support substrate when making composite substrate for optics by bonding substrates such that inner outline of chamfer of substrate is inscribed within outline of other substrate
EP3699952A1|2020-08-26|Method for transferring a thin film from a substrate to a flexible support
EP3823013A1|2021-05-19|Method for dismantling a stack of at least three substrates
FR3109016A1|2021-10-08|DISMOUNTABLE STRUCTURE AND TRANSFER PROCESS OF A LAYER IMPLEMENTING THE SAID DISMOUNTABLE STRUCTURE
FR3087297A1|2020-04-17|THIN FILM TRANSFER METHOD
FR2959596A1|2011-11-04|DETOURING SLURRY
FR3057101A1|2018-04-06|PROCESS FOR PRODUCING A COMPOSITE SUBSTRATE
FR2967295A1|2012-05-11|PROCESS FOR PROCESSING A MULTILAYER STRUCTURE
FR2968833A1|2012-06-15|METHOD OF SLIMMING AND CUTTING ELECTRONIC CIRCUIT BOARDS
同族专利:
公开号 | 公开日
AU2016203094B2|2018-03-08|
KR20160143523A|2016-12-14|
CN106252280B|2020-01-31|
AU2016203094A1|2016-12-22|
CN106252280A|2016-12-21|
TW201643953A|2016-12-16|
FR3037189B1|2020-02-28|
US10910250B2|2021-02-02|
JP2017005245A|2017-01-05|
JP6413129B2|2018-10-31|
FR3037189A1|2016-12-09|
US20160358805A1|2016-12-08|
IL245492A|2021-08-31|
IL245492D0|2016-08-31|
BE1023710A1|2017-06-22|
DE102015210384A1|2016-12-08|
SG10201604535PA|2017-01-27|
TWI694509B|2020-05-21|
KR101840718B1|2018-05-04|
US20210118717A1|2021-04-22|
引用文献:
公开号 | 申请日 | 公开日 | 申请人 | 专利标题
US20140353853A1|2011-12-29|2014-12-04|Commissariat à I'énergie atomique et aux énergies alternatives|Method for manufacturing a multilayer structure on a substrate|
FR2997553A1|2012-10-31|2014-05-02|Soitec Silicon On Insulator|Method for mechanical separation of structure formed of two monocrystalline substrates, involves determining directions corresponding to lowest fracture energy values while inserting and moving blade according to separation axis|
FR2997554A1|2012-10-31|2014-05-02|Soitec Silicon On Insulator|METHOD OF MODIFYING AN INITIAL STRAIN STATUS FROM AN ACTIVE LAYER TO A FINAL STRAIN STATUS|
TW437078B|1998-02-18|2001-05-28|Canon Kk|Composite member, its separation method, and preparation method of semiconductor substrate by utilization thereof|
US6562648B1|2000-08-23|2003-05-13|Xerox Corporation|Structure and method for separation and transfer of semiconductor thin films onto dissimilar substrate materials|
FR2823599B1|2001-04-13|2004-12-17|Commissariat Energie Atomique|DEMOMTABLE SUBSTRATE WITH CONTROLLED MECHANICAL HOLDING AND METHOD OF MAKING|
US6814832B2|2001-07-24|2004-11-09|Seiko Epson Corporation|Method for transferring element, method for producing element, integrated circuit, circuit board, electro-optical device, IC card, and electronic appliance|
US6743662B2|2002-07-01|2004-06-01|Honeywell International, Inc.|Silicon-on-insulator wafer for RF integrated circuit|
FR2844634B1|2002-09-18|2005-05-27|Soitec Silicon On Insulator|FORMATION OF A RELAXED USEFUL LAYER FROM A PLATE WITHOUT BUFFER LAYER|
US20050082526A1|2003-10-15|2005-04-21|International Business Machines Corporation|Techniques for layer transfer processing|
JP2009532918A|2006-04-05|2009-09-10|シリコンジェネシスコーポレーション|Manufacturing method and structure of solar cell using layer transfer process|
JP2009543225A|2006-06-30|2009-12-03|テレアトラスノースアメリカインコーポレイテッド|Nearest neighbor search for adaptive index with variable compression|
JP5111620B2|2008-01-24|2013-01-09|ブルーワーサイエンスアイエヌシー.|Method of mounting device wafer reversely on carrier substrate|
FR2929758B1|2008-04-07|2011-02-11|Commissariat Energie Atomique|TRANSFER METHOD USING A FERROELECTRIC SUBSTRATE|
FR2935536B1|2008-09-02|2010-09-24|Soitec Silicon On Insulator|PROGRESSIVE DETOURING METHOD|
EP2213415A1|2009-01-29|2010-08-04|S.O.I. TEC Silicon|Device for polishing the edge of a semiconductor substrate|
EP2246882B1|2009-04-29|2015-03-04|Soitec|Method for transferring a layer from a donor substrate onto a handle substrate|
KR20110062365A|2009-12-03|2011-06-10|현대자동차주식회사|Exhaust manifold structure combined with turbocharger|
JP5644134B2|2010-02-25|2014-12-24|ブラザー工業株式会社|Image recording device|
FR2980919B1|2011-10-04|2014-02-21|Commissariat Energie Atomique|DOUBLE LAYER REPORT METHOD|
KR102061695B1|2012-10-17|2020-01-02|삼성전자주식회사|Wafer processing method|
US9281233B2|2012-12-28|2016-03-08|Sunedison Semiconductor Limited|Method for low temperature layer transfer in the preparation of multilayer semiconductor devices|
FR3019374A1|2014-03-28|2015-10-02|Soitec Silicon On Insulator|METHOD FOR SEPARATING AND TRANSFERTING LAYERS|
KR20180010274A|2015-06-19|2018-01-30|큐맷, 인코포레이티드|Bond and release layer transport process|CN105931997B|2015-02-27|2019-02-05|胡迪群|Temporary combined type support plate|
FR3103313B1|2019-11-14|2021-11-12|Commissariat Energie Atomique|Method of disassembling a stack of at least three substrates|
法律状态:
优先权:
申请号 | 申请日 | 专利标题
DE102015210384.6A|DE102015210384A1|2015-06-05|2015-06-05|Method for mechanical separation for a double-layer transfer|
DE102015210384.6|2015-06-05|
[返回顶部]